• DocumentCode
    3272167
  • Title

    Spintronic logic gates for spintronic data using magnetic tunnel junctions

  • Author

    Patil, Shruti ; Lyle, Andrew ; Harms, Jonathan ; Lilja, David J. ; Wang, Jian-Ping

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Minnesota Twin Cities, Minneapolis, MN, USA
  • fYear
    2010
  • fDate
    3-6 Oct. 2010
  • Firstpage
    125
  • Lastpage
    131
  • Abstract
    The emerging field of spintronics is undergoing exciting developments with the advances recently seen in spintronic devices, such as magnetic tunnel junctions (MTJs). While they make excellent memory devices, recently they have also been used to accomplish logic functions. The properties of MTJs are greatly different from those of electronic devices like CMOS semiconductors. This makes it challenging to design circuits that can efficiently leverage the spintronic capabilities. The current approaches to achieving logic functionality with MTJs include designing an integrated CMOS and MTJ circuit, where CMOS devices are used for implementing the required intermediate read and write circuitry. The problem with this approach is that such intermediate circuitry adds overheads of area, delay and power consumption to the logic circuit. In this paper, we present a circuit to accomplish logic operations using MTJs on data that is stored in other MTJs, without an intermediate electronic circuitry. This thus reduces the performance overheads of the spintronic circuit while also simplifying fabrication. With this circuit, we discuss the notion of performing logic operations with a non-volatile memory device and compare it with the traditional method of computation with separate logic and memory units. We find that the MTJ-based logic unit has the potential to offer a higher energy-delay efficiency than that of a CMOS-based logic operation on data stored in a separate memory module.
  • Keywords
    CMOS integrated circuits; logic gates; magnetic tunnelling; magnetoelectronics; CMOS semiconductors; magnetic tunnel junctions; memory devices; read and write circuitry; spintronic data; spintronic logic gates; Delay; Integrated circuits; Magnetic tunneling; Magnetoelectronics; Performance evaluation; Random access memory; Resistance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design (ICCD), 2010 IEEE International Conference on
  • Conference_Location
    Amsterdam
  • ISSN
    1063-6404
  • Print_ISBN
    978-1-4244-8936-7
  • Type

    conf

  • DOI
    10.1109/ICCD.2010.5647611
  • Filename
    5647611