Title :
The logarithmic number system for strength reduction in adaptive filtering
Author :
Sacha, John R. ; Irwin, Mary Jane
Author_Institution :
Dept. of Comput. Sci. & Eng., Pennsylvania State Univ., University Park, PA, USA
Abstract :
An important technique for reducing power consumption in VLSI systems is strength reduction, the substitution of a less-costly operation such as a shift, for a more-costly operation such a multiplication. Using a logarithmic number representation provides several opportunities for strength reductions; in particular, multiplication is performed as the fixed-point addition of logarithms, and extracting a square root is implemented via a shift. These reductions occur transparently at the hardware level; consequently relatively little algorithmic modification is required, and they are readily applicable to adaptive filtering. For performing Givens rotations in the QR decomposition recursive least squares adaptive filter, logarithmic arithmetic is shown to compare favorably to other strength reduction techniques, such as CORDIC arithmetic, in terms of switched capacitance and numerical accuracy.
Keywords :
VLSI; adaptive filters; capacitance; digital arithmetic; digital filters; fixed point arithmetic; least squares approximations; low-power electronics; Givens rotations; QR decomposition RLS filter; VLSI systems; adaptive filtering; fixed-point addition; logarithmic arithmetic; logarithmic number system; multiplication; numerical accuracy; power consumption reduction; recursive least squares adaptive filter; shift operation; square root extraction; strength reduction; switched capacitance;
Conference_Titel :
Low Power Electronics and Design, 1998. Proceedings. 1998 International Symposium on
Conference_Location :
Monterey, CA, USA
Print_ISBN :
1-58113-059-7