DocumentCode :
3272625
Title :
Inter-socket victim cacheing for platform power reduction
Author :
Mazumdar, Subhra ; Tullsen, Dean M. ; Song, Justin
Author_Institution :
Univ. of California, San Diego, CA, USA
fYear :
2010
fDate :
3-6 Oct. 2010
Firstpage :
509
Lastpage :
514
Abstract :
On a multi-socket architecture with load below peak, as is often the case in a server installation, it is common to consolidate load onto fewer sockets to save processor power. However, this can increase main memory power consumption due to the decreased total cache space. This paper describes inter-socket victim cacheing, a technique that enables such a system to do both load consolidation and cache aggregation at the same time. It uses the last level cache of an idle processor in a connected socket as a victim cache, holding evicted data from the active processor. This enables expensive main memory accesses to be replaced by cheaper cache hits. This work examines both static and dynamic victim cache management policies. Energy savings is as high as 32.5%, and averages 5.8%.
Keywords :
cache storage; energy conservation; microprocessor chips; cache aggregation; dynamic victim cache management; energy saving; idle processor; intersocket victim cacheing; load consolidation; main memory power consumption; multisocket architecture; platform power reduction; server installation; static victim cache management; Benchmark testing; Hidden Markov models; Instruction sets; Random access memory; Servers; Sockets; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design (ICCD), 2010 IEEE International Conference on
Conference_Location :
Amsterdam
ISSN :
1063-6404
Print_ISBN :
978-1-4244-8936-7
Type :
conf
DOI :
10.1109/ICCD.2010.5647634
Filename :
5647634
Link To Document :
بازگشت