Title :
A three-port adiabatic register file suitable for embedded applications
Author :
Avery, Stephen ; Jabri, Marwan
Author_Institution :
New South Wales Univ., Kensington, NSW, Australia
Abstract :
Adiabatic logic promises extremely low power consumption for those applications where slower clock rates are acceptable. However, there have been very few adiabatic memory designs, and any circuit of even moderate complexity requires some form of RAM. This paper presents a register file implemented entirely with adiabatic logic, and fabricated using a 1.2 /spl mu/m CMOS technology. Comparison with a conventional CMOS logic implementation, using both measured and simulated results, indicates significant power savings have been realised.
Keywords :
CMOS memory circuits; logic design; low-power electronics; random-access storage; 1.2 micron; CMOS technology; adiabatic logic; adiabatic memory designs; clock rates; embedded applications; low power consumption; three-port adiabatic register file;
Conference_Titel :
Low Power Electronics and Design, 1998. Proceedings. 1998 International Symposium on
Conference_Location :
Monterey, CA, USA
Print_ISBN :
1-58113-059-7
