• DocumentCode
    3272873
  • Title

    Simulation and implementation of Costas loop based on FPGA

  • Author

    Guo, LaiGong ; OuYang, MingSan ; Cai, Jun

  • Author_Institution
    Coll. of Electr. & Inf. Eng., An Hui Univ. of Sci. & Technol., Huainan, China
  • fYear
    2011
  • fDate
    15-17 April 2011
  • Firstpage
    1696
  • Lastpage
    1699
  • Abstract
    The article introduces the method of implementation Costas loop based on FPGA through the analysis of digital Costas loop´s principle, which in detailed describes the various parts of the circuit model and circuit design parameters. The method has the advantages of flexibility, easy implement and easy integration. The results of simulation show that the loop is stable and has excellent performance.
  • Keywords
    circuit simulation; field programmable gate arrays; network synthesis; Costas loop; FPGA; circuit design; circuit model; simulation; Digital signal processing; Field programmable gate arrays; Finite impulse response filter; Integrated circuit modeling; Read only memory; Registers; Voltage-controlled oscillators; Costas Loop; DDS; DSP builder; FPGA;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electric Information and Control Engineering (ICEICE), 2011 International Conference on
  • Conference_Location
    Wuhan
  • Print_ISBN
    978-1-4244-8036-4
  • Type

    conf

  • DOI
    10.1109/ICEICE.2011.5777236
  • Filename
    5777236