Thermal experimental and modeling analysis of high power 3D packages

Author

Oprins, H. ; Cherman, V. ; Van der Plas, G. ; Maggioni, F. ; De Vos, J. ; Beyne, E.

Author_Institution

Imec, Leuven, Belgium

fYear

2015

fDate

1-3 June 2015

Firstpage

1

Lastpage

4

Abstract

In this paper, we present the experimental and modeling characterization of 3D packages for high power applications using a dedicated stackable test chip. An advanced CMOS test chip with programmable power distribution and a 32×32 array of temperature sensors has been designed, fabricated, stacked and packaged in bare die 3D packages. The package thermal measurements have been used to characterize the thermal behavior and to successfully validate the thermal finite element modeling results.

Keywords

CMOS integrated circuits; finite element analysis; integrated circuit interconnections; integrated circuit modelling; integrated circuit packaging; integrated circuit testing; thermal analysis; three-dimensional integrated circuits; advanced CMOS test chip; bare die 3D packages; dedicated stackable test chip; high power 3D packages; high power applications; package thermal measurements; programmable power distribution; temperature sensors; thermal behavior; thermal experimental analysis; thermal finite element modeling results; Heating; Power dissipation; Power measurement; Semiconductor device measurement; Temperature measurement; Thermal analysis; Three-dimensional displays; 3DIC; high power; thermal analysis; thermal measurements;

fLanguage

English

Publisher

ieee

Conference_Titel

IC Design & Technology (ICICDT), 2015 International Conference on

Conference_Location

Leuven

Type

conf

DOI

10.1109/ICICDT.2015.7165906

Filename

7165906