• DocumentCode
    3273618
  • Title

    HyperLink NAND Flash Architecture for Mass Storage Applications

  • Author

    Schuetz, Roland ; Oh, HakJune ; Kim, Jin-Ki ; Pyeon, Hong-Beom ; Przybylski, Steven A. ; Gillingham, Peter

  • Author_Institution
    MOSAID Technol. Incorp., Ottawa
  • fYear
    2007
  • fDate
    26-30 Aug. 2007
  • Firstpage
    3
  • Lastpage
    4
  • Abstract
    The dramatic price reduction of NAND Flash devices in recent years has created an opportunity for Flash to penetrate mass storage applications. This will happen provided the memory vendors can deliver NAND Flash devices with adequate performance and no intrinsic cost premium over the lowest cost conventional NAND Flash devices. The new HLNAND Flash Architecture facilitates this transition by enabling high performance NAND Flash devices with increased longevity and a cost advantage stemming from the low pin count interface and small die size.
  • Keywords
    NAND circuits; flash memories; integrated memory circuits; dramatic price reduction; hyperlink NAND flash architecture; low pin count interface; mass storage; memory vendors; Bandwidth; Clocks; Communication system control; Costs; Flash memory; Frequency; Memory architecture; System performance; Technological innovation; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Non-Volatile Semiconductor Memory Workshop, 2007 22nd IEEE
  • Conference_Location
    Monterey, CA
  • Print_ISBN
    1-4244-0753-2
  • Electronic_ISBN
    1-4244-0753-2
  • Type

    conf

  • DOI
    10.1109/NVSMW.2007.4290560
  • Filename
    4290560