DocumentCode
3273630
Title
Scaling Non-Volatile Memory Below 30nm
Author
Prall, Kirk
Author_Institution
Micron Technol. Inc., Boise
fYear
2007
fDate
26-30 Aug. 2007
Firstpage
5
Lastpage
10
Abstract
The future scaling challenges of non-volatile memories for 32 Gb+ using 30 nm and below feature sizes are discussed. The key challenges reviewed include structural integrity, floating gate scaling, floating gate replacement, noise and variation. Future trends are discussed.
Keywords
nanoelectronics; random-access storage; floating gate replacement; floating gate scaling; nonvolatile memory scaling; Charge transfer; Degradation; Dielectrics; Electrons; Interference; Kirk field collapse effect; Nonvolatile memory; Space charge; Stress; Threshold voltage; 30nm; floating gate elimination; mechanical stress; noise; non-volatile memory; scaling; variation;
fLanguage
English
Publisher
ieee
Conference_Titel
Non-Volatile Semiconductor Memory Workshop, 2007 22nd IEEE
Conference_Location
Monterey, CA
Print_ISBN
1-4244-0753-2
Electronic_ISBN
1-4244-0753-2
Type
conf
DOI
10.1109/NVSMW.2007.4290561
Filename
4290561
Link To Document