Funcational Test with Single Compaction Output for Digital IP Cores

In this paper, a novel functional test methodology with single compaction output for embedded digital intellectual property cores on a system-on-a-chip is proposed. The functional test method is independent of the fault model and the structure of the core under test and uses only the knowledge of the test set and corresponding fault-free responses. In addition, advantages of our approach include single compaction output and implementation only by single test application. Hence, as test time consumption is concerned, the method excels those counterparts, in which single compaction output with zero-aliasing is obtained via two step or two mode. Also, in order to lower hardware overhead, encoding technique is adopted to both normal response and practical response during test application, so we improved the idea to deal with similar problem