DocumentCode :
3273997
Title :
Feasibility study of dynamic Trusted Platform Module
Author :
Kanuparthi, Arun K. ; Zahran, Mohamed ; Karri, Ramesh
Author_Institution :
Polytech. Inst., New York Univ., New York, NY, USA
fYear :
2010
fDate :
3-6 Oct. 2010
Firstpage :
350
Lastpage :
355
Abstract :
A Trusted Platform Module (TPM) authenticates general purpose computing platforms. This is done by taking platform integrity measurement and comparing it with a precomputed value at boot-time. Existing TPM architectures do not support run-time integrity checking of a program on the platform. Attackers can modify the program after it has been verified at the Time Of Check (TOC) and before its Time Of Use (TOU). In this paper we study the feasibility of integrating a dynamic on-chip TPM (DTPM) into the core processor pipeline to protect against TOCTOU attacks. We explore the challenges involved in designing DTPM and describe techniques to improve its performance. The proposed DTPM has 2.5% area overhead and 18% performance impact when compared to a single processor core without DTPM.
Keywords :
microprocessor chips; security of data; DTPM; TOCTOU attacks; core processor pipeline; dynamic on-chip TPM; dynamic trusted platform module; general purpose computing platforms; integrity measurement; time of check; time of use; Benchmark testing; Cryptography; Optimization; Pipelines; Radiation detectors; System-on-a-chip; Time measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design (ICCD), 2010 IEEE International Conference on
Conference_Location :
Amsterdam
ISSN :
1063-6404
Print_ISBN :
978-1-4244-8936-7
Type :
conf
DOI :
10.1109/ICCD.2010.5647705
Filename :
5647705
Link To Document :
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