Title :
Self Aligned Trap-Shallow Trench Isolation Scheme for the Reliability of TANOS (TaN/AlO/SiN/Oxide/Si) NAND Flash Memory
Author :
Sim, Jae Sung ; Park, Jintaek ; Kang, Changseok ; Jung, Wonseok ; Shin, Yoocheol ; Kim, Juhyung ; Sel, Jongsun ; Lee, ChangHyun ; Jeon, Sanghun ; Jeong, Younseok ; Park, Youngwoo ; Choi, Jungdal ; Lee, Won-Seong
Author_Institution :
Samsung Electron. Co., Ltd., Yongin
Abstract :
In the proposed new scheme, which is named self aligned trap-shallow trench isolation (SAT-STI), such process damage on high-k layer can be minimized, achieving the goal of isolating the storage nitride layer successfully.
Keywords :
aluminium compounds; flash memories; isolation technology; semiconductor device reliability; silicon compounds; tantalum compounds; NAND flash memory; TaN-Al2O3-Si3N4-SiO2-Si; self aligned trap-shallow trench isolation; storage nitride layer isolation; Aluminum oxide; Dielectrics; Electrodes; Electron traps; Electronic mail; Etching; Material storage; Research and development; Semiconductor device reliability; Silicon compounds;
Conference_Titel :
Non-Volatile Semiconductor Memory Workshop, 2007 22nd IEEE
Conference_Location :
Monterey, CA
Print_ISBN :
1-4244-0753-2
Electronic_ISBN :
1-4244-0753-2
DOI :
10.1109/NVSMW.2007.4290602
