DocumentCode :
3275014
Title :
Design and Fabrication of a High Performance LDMOSFET with Step Doped Drift Region on Bonded SOI Wafers
Author :
Guo, Yufeng ; Li, Zhaoji ; Zhang, Bo
Author_Institution :
Coll. of Optioelectronic Eng., Nanjing Univ. of Posts & Telecommun., Nanjing
Volume :
4
fYear :
2006
fDate :
25-28 June 2006
Firstpage :
2741
Lastpage :
2744
Abstract :
The SOI LDMOSFETs with step doping profiles in drift region have been experimentally investigated. Uniform, single-step and two-step doped drift regions have been designed and fabricated on a same bonded SOI wafer with the top silicon layer of 3 mum and buried oxide layer of 1.5 mum. The experimental devices with two-step doping profile have a breakdown voltage in access of 250 V and specific on-resistance of 1.6 Omegamm2. Furthermore, the breakdown characteristic and forward conduction characteristic for the various step doping profiles were measured and compared. The results show two-step doping can enable increase in the breakdown voltage by 40% and decrease in on-resistance by 16% in comparison to the conventional uniformly doped drift device.
Keywords :
MOSFET; buried layers; electrical conductivity; electrical resistivity; semiconductor device breakdown; semiconductor doping; silicon-on-insulator; LDMOSFET; Si; bonded SOI wafers; breakdown voltage; buried oxide layer; forward conduction characteristic; on-resistance; size 1.5 mum; size 3 mum; step doped drift region; top silicon layer; Analytical models; Costs; Design engineering; Doping profiles; Educational institutions; Electric breakdown; Fabrication; Permittivity; Silicon; Wafer bonding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, Circuits and Systems Proceedings, 2006 International Conference on
Conference_Location :
Guilin
Print_ISBN :
0-7803-9584-0
Electronic_ISBN :
0-7803-9585-9
Type :
conf
DOI :
10.1109/ICCCAS.2006.285236
Filename :
4064483
Link To Document :
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