Title :
Time-domain analysis of the signal integrity of a 1-Gbps 4-module memory bus with a broadband ceramic directional coupler designed in the frequency domain
Author :
Uematsu, Y. ; Osaka, H. ; Ikeda, H. ; Sakisaka, Y.
Author_Institution :
Syst. Dev. Lab., Hitachi Ltd., Kanagawa, Japan
Abstract :
To make a 1 Gbps 4-module memory bus at low cost, we designed a ceramic directional coupler (CDC) in the frequency domain and confirmed the performance of the bus in the time domain. The specification for the CDC was designed by translating the time domain properties to the S-parameters. We have fabricated the CDCs and verified the design validity and the bus performance using a test board. The results indicate effectiveness of the design method of the CDC and a 1-Gbps 4-module memory bus performance for the bus using the CDCs.
Keywords :
DRAM chips; S-parameters; SPICE; crosstalk; directional couplers; equivalent circuits; frequency-domain analysis; multiport networks; time-domain analysis; transient analysis; 1 Gbit/s; 4-port network; DRAM memory bus; S-parameters; SPICE; broadband ceramic directional coupler; bus performance; crosstalk transfer logic interface; design validity; equivalent circuit; four-module memory bus; frequency domain design; signal integrity; time-domain analysis; transient analysis; Ceramics; Costs; Coupling circuits; Crosstalk; Directional couplers; Frequency domain analysis; Random access memory; Signal analysis; Signal design; Time domain analysis;
Conference_Titel :
Electronic Components and Technology Conference, 2004. Proceedings. 54th
Print_ISBN :
0-7803-8365-6
DOI :
10.1109/ECTC.2004.1320354
