Efficient FPGA-based design and realization of squaring circuit

In order to solve the problem of excessive IP(Intellectual Property) usage when calculating large-size squares by using embedded multipliers in FPGA directly, this paper presents an efficient method for square calculation. The proposed method reduces the width of operands by a simple iterative logic circuit, then realizes square calculation combine with the embedded DSP48E. For a 32-bit square calculation, experimental and simulation results show that the method can get good results only by using one DSP48E with a small amount of logic resources.