• DocumentCode
    3275980
  • Title

    Design and implementation of a special purpose embedded system for neural machine interface

  • Author

    Zhang, Xiaorong ; Huang, He ; Yang, Qing

  • Author_Institution
    Dept. of Electr., Comput., & Biomed. Eng., Univ. of Rhode Island, Kingston, RI, USA
  • fYear
    2010
  • fDate
    3-6 Oct. 2010
  • Firstpage
    166
  • Lastpage
    172
  • Abstract
    Our previous study has shown the potential of using a computer system to accurately decode electromyographic (EMG) signals for neural controlled artificial legs. Because of computation complexity of the training algorithm coupled with real time requirement of controlling artificial legs, traditional embedded systems generally cannot be directly applied to the system. This paper presents a new design of an FPGA-based neural-machine interface for artificial legs. Both the training algorithm and the real time controlling algorithm are implemented on an FPGA. A soft processor built on the FPGA is used to manage hardware components and direct data flows. The implementation and evaluation of this design are based on Altera Stratix II GX EP2SGX90 FPGA device on a PCI Express development board. Our performance evaluations indicate that a speedup of around 280X can be achieved over our previous software implementation with no sacrifice of computation accuracy. The results demonstrate the feasibility of a self-contained, low power, and high performance real-time neural-machine interface for artificial legs.
  • Keywords
    artificial limbs; electromyography; embedded systems; field programmable gate arrays; microprocessor chips; neurophysiology; peripheral interfaces; FPGA-based neural machine interface; PCI express development board; computation complexity; computer system; direct data flow; electromyographic signal; neural controlled artificial leg; soft processor; software implementation; special purpose embedded system; training algorithm; Algorithm design and analysis; Electromyography; Feature extraction; Field programmable gate arrays; Real time systems; Testing; Training;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design (ICCD), 2010 IEEE International Conference on
  • Conference_Location
    Amsterdam
  • ISSN
    1063-6404
  • Print_ISBN
    978-1-4244-8936-7
  • Type

    conf

  • DOI
    10.1109/ICCD.2010.5647801
  • Filename
    5647801