DocumentCode
3276264
Title
Channel routing in Manhattan-diagonal model
Author
Das, Sandip ; Bhattacharya, Bhargab B.
Author_Institution
Dept. of Comput. Sci., North Bengal Univ., Darjeeling, India
fYear
1996
fDate
3-6 Jan 1996
Firstpage
43
Lastpage
48
Abstract
This paper presents a new technique of channel routing based on the Manhattan-Diagonal (MD) model. The layout grid is assumed to consist of two layers with tracks in horizontal, vertical and ±45° directions. First, we consider the non-overlap model and present a simple O(l,d) time algorithm that routes an arbitrary channel with no cyclic vertical constraints in w tracks, where l is the length of the channel, d is the channel density, and d⩽w⩽(d+1). Next, we describe an output-sensitive algorithm that can route general channels with cyclic vertical constraints using w tracks, in O(l,w) time allowing overlapping of wiring segments in two layers. The router outputs an 18-track solution for the Deutsch´s difficult example, a 2-track solution for Burstein´s difficult channel, and a 15-track solution for cycle.tough without inserting any extra row or column. Apart from quick termination, the proposed algorithms provide solutions with significantly low via count and reduced wire length. The study thus reveals the superiority of MD-routing strategy to classical techniques
Keywords
VLSI; circuit layout CAD; integrated circuit layout; network routing; Manhattan-diagonal model; VLSI layout; channel routing; cyclic vertical constraints; layout grid; low via count; output-sensitive algorithm; reduced wire length; Fabrication; Geometry; Integrated circuit modeling; Routing; Solid modeling; Very large scale integration; Wire; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 1996. Proceedings., Ninth International Conference on
Conference_Location
Bangalore
ISSN
1063-9667
Print_ISBN
0-8186-7228-5
Type
conf
DOI
10.1109/ICVD.1996.489452
Filename
489452
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