DocumentCode :
3276283
Title :
An efficient LDPC encoder based on block-column-cycle structure for CMMB
Author :
Lei Liu ; Changyin Liu ; Ziliang Lin
Author_Institution :
Sch. of Inf. Eng., Commun. Univ. of China, Beijing, China
fYear :
2013
fDate :
23-25 May 2013
Firstpage :
511
Lastpage :
514
Abstract :
Concerning the high encoding complexity of LDPC codes, an efficient encoder based on block-column-cycle structure for CMMB is proposed, which is able to take full advantage of the characteristics of the sparse parity-check matrix, such as cyclicity and equality of column weight. Experimental results show that the proposed encoder can reduce dramatically the memory requirements in hardware implementation, and improve the encoding rate at the same time.
Keywords :
block codes; cyclic codes; parity check codes; sparse matrices; CMMB; LDPC codes; LDPC encoder; block-column-cycle structure; encoding complexity; encoding rate; hardware implementation; sparse parity-check matrix characteristics; Brain modeling; Encoding; Gold; CMMB; LDPC encoder; block-column-cycle;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Software Engineering and Service Science (ICSESS), 2013 4th IEEE International Conference on
Conference_Location :
Beijing
ISSN :
2327-0586
Print_ISBN :
978-1-4673-4997-0
Type :
conf
DOI :
10.1109/ICSESS.2013.6615361
Filename :
6615361
Link To Document :
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