• DocumentCode
    3276298
  • Title

    Memory efficient programmable processor for bitstream processing and entropy decoding of multiple-standard high-bitrate HDTV video bitstreams

  • Author

    Nolte, N. ; Moch, S. ; Kock, M. ; Pirsch, P.

  • Author_Institution
    Inst. of Microelectron. Syst., Leibniz Univ. Hannover, Hannover, Germany
  • fYear
    2009
  • fDate
    9-11 Sept. 2009
  • Firstpage
    427
  • Lastpage
    431
  • Abstract
    Decoding of high bitrate video bitstreams is an application field traditionally claimed by dedicated hardware architectures, since embedded general purpose processors are not able to satisfy the high performance requirements of entropy decoding. We present a fully programmable multi-standard bitstream processor. The proposed bit granular memory and data path architecture provides efficient processing and storage capabilities for data words of arbitrary length. Running at a 300 MHz clock frequency, the processor is able to decode, e.g., MPEG-2 and VC-1 1080p HDTV bitstreams with a maximum bitrate of 100 Mbit/s.
  • Keywords
    data compression; decoding; entropy codes; high definition television; program processors; video coding; HDTV video; bit granular memory; data path architecture; efficient memory storage; entropy decoding; frequency 300 MHz; high bitrate video bitstreams; programmable multistandard bitstream processor; Automatic voltage control; Bit rate; Decoding; Entropy coding; HDTV; Hardware; High definition video; ISO standards; Transform coding; Video compression;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOC Conference, 2009. SOCC 2009. IEEE International
  • Conference_Location
    Belfast
  • Print_ISBN
    978-1-4244-4940-8
  • Electronic_ISBN
    978-1-4244-4941-5
  • Type

    conf

  • DOI
    10.1109/SOCCON.2009.5398001
  • Filename
    5398001