• DocumentCode
    3276378
  • Title

    A PCI-compatible FPGA-coprocessor for 2D/3D image processing

  • Author

    Knittel, Günter

  • Author_Institution
    Tubingen Univ., Germany
  • fYear
    1996
  • fDate
    17-19 Apr 1996
  • Firstpage
    136
  • Lastpage
    145
  • Abstract
    We present a small-scale FPGA-coprocessor board for PCI-based systems. It features one XC3195A FPGA (<9 K gate equivalents), three XC4013 devices (each up to 13 K gate equivalents), 2 MByte of Flash Memory, 256 KByte of high-speed SRAM and a 16-bit high-speed multiply-and-accumulate unit. The board was designed to speed up algorithms from scientific visualization, in particular the visualization of 3D-datasets. Such algorithms show a large number of short integer or bit operations, which can efficiently be off-loaded from the CPU to an FPGA-coprocessor. Although being exactly tailored to our application, the accelerator constitutes a versatile platform for other algorithms from image or speech processing. The PCI-bus provides the necessary transfer bandwidth for dataflow-intensive computations
  • Keywords
    coprocessors; data visualisation; digital arithmetic; field programmable gate arrays; image processing; 2D/3D image processing; 3D-datasets; Flash Memory; PCI-based systems; PCI-compatible FPGA-coprocessor; XC3195A FPGA; XC4013 devices; dataflow-intensive computations; high-speed SRAM; multiply-and-accumulate unit; scientific visualization; transfer bandwidth; Scientific visualization;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    FPGAs for Custom Computing Machines, 1996. Proceedings. IEEE Symposium on
  • Conference_Location
    Napa Valley, CA
  • Print_ISBN
    0-8186-7548-9
  • Type

    conf

  • DOI
    10.1109/FPGA.1996.564782
  • Filename
    564782