DocumentCode
3276662
Title
A low-power pairing-based cryptographic accelerator for embedded security applications
Author
English, Tom ; Keller, Maurice ; Man, Ka Lok ; Popovici, Emanuel ; Schellekens, Michel ; Marnane, William
Author_Institution
Dept of Microelectron. Eng., Univ. Coll. Cork, Cork, Ireland
fYear
2009
fDate
9-11 Sept. 2009
Firstpage
369
Lastpage
372
Abstract
We report on the implementation of an IP core for Pairing-based cryptography. The core performs an elliptic curve cryptographic operation called the Tate Pairing over the field GF(2251). In this paper, we describe the implementation of the design in TSMC 65 nm GP CMOS standard cells and the optimisations made for low-power operation. The resulting core computes the pairing in 1.5 ms and consumes less than 4 mW.
Keywords
CMOS integrated circuits; public key cryptography; CMOS standard cells; IP core; Tate pairing; elliptic curve cryptographic operation; embedded security applications; low-power pairing-based cryptographic accelerator; size 65 nm; Application specific integrated circuits; Elliptic curve cryptography; Elliptic curves; Hardware; Identity-based encryption; Microelectronics; Natural languages; Public key cryptography; Runtime; Security;
fLanguage
English
Publisher
ieee
Conference_Titel
SOC Conference, 2009. SOCC 2009. IEEE International
Conference_Location
Belfast
Print_ISBN
978-1-4244-4940-8
Electronic_ISBN
978-1-4244-4941-5
Type
conf
DOI
10.1109/SOCCON.2009.5398017
Filename
5398017
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