DocumentCode :
3276682
Title :
Fast dynamic power estimation considering glitch filtering
Author :
Wang, L. ; Olbrich, M. ; Barke, E. ; Büchner, T. ; Bühler, M.
Author_Institution :
Inst. of Microelectron. Syst., Leibniz Univ. of Hannover, Hannover, Germany
fYear :
2009
fDate :
9-11 Sept. 2009
Firstpage :
361
Lastpage :
364
Abstract :
In this paper, we discuss probabilistic simulation techniques used to estimate dynamic power and especially glitch power. Major attention is paid to the problem of modeling inertial delay for using these techniques to estimate switching density at gate level. The inertial delay has a great impact on the glitch power due to filtering effects and is almost impossible to be modeled completely. We propose an approximation algorithm to achieve better accuracy compared to existing approaches. Examples show up to 60% improvement using our solution.
Keywords :
delays; logic gates; switching circuits; approximation algorithm; fast dynamic power estimation; glitch filtering; glitch power; inertial delay modeling; probabilistic simulation; switching density; Approximation algorithms; Circuits; Clocks; Delay effects; Delay estimation; Energy consumption; Filtering; Low pass filters; Parasitic capacitance; Probability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOC Conference, 2009. SOCC 2009. IEEE International
Conference_Location :
Belfast
Print_ISBN :
978-1-4244-4940-8
Electronic_ISBN :
978-1-4244-4941-5
Type :
conf
DOI :
10.1109/SOCCON.2009.5398019
Filename :
5398019
Link To Document :
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