A rule-based approach for improving allocation of filter structures in HLS

Author

öberg, Johnny ; Isoaho, Jouni ; Ellervee, Peeter ; Jantsch, Axel ; Hemani, Ahmed

Author_Institution

Dept. of Electron. Syst. Design Lab., R. Inst. of Technol., Stockholm, Sweden

fYear

1996

fDate

3-6 Jan 1996

Firstpage

133

Lastpage

139

Abstract

A rule based allocator for improving synthesis of filter systems is presented. The principles of the Enhanced AIlocation Rule Language Interpreter (EARLI) are presented. Possible transformations, optimisations and how to express them in EARLI are discussed. Experiments show that relative area gains ranging from 5 to 44%, depending on the chosen target technology, can be achieved using the designers knowledge about the design class. Experiments also indicate that employing direct mapping of CDFG subgraphs onto preoptimised RTL-level macroblocks would have resulted in a relative area gain of 500%. The macroblock had only 16% of the area produced by the HLS-tool

Keywords

VLSI; circuit CAD; circuit optimisation; digital filters; high level synthesis; integrated circuit design; knowledge based systems; program interpreters; CDFG subgraphs; EARLI; Enhanced AIlocation Rule Language Interpreter; area gain; direct mapping; filter structures allocation; filter systems synthesis; high level synthesis; optimisations; preoptimised RTL-level macroblocks; rule based allocator; transformations; Databases; Design automation; Design optimization; Filters; High level synthesis; Logic; Productivity; Scheduling algorithm; Signal processing algorithms; Signal synthesis;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design, 1996. Proceedings., Ninth International Conference on

Conference_Location

Bangalore

ISSN

1063-9667

Print_ISBN

0-8186-7228-5

Type

conf

DOI

10.1109/ICVD.1996.489472

Filename

489472