• DocumentCode
    3276797
  • Title

    Advances in linearised GaAs MESFET circuit design techniques

  • Author

    Haigh, D.G. ; Radmore, P.M. ; Parker, A.E.

  • Author_Institution
    Dept. of Electron. & Electr. Eng., Univ. CoIl., London, UK
  • Volume
    4
  • fYear
    1992
  • fDate
    3-6 May 1992
  • Firstpage
    2037
  • Abstract
    Discusses the synthesis of linearized conductance functions using GaAs MESFETs which have an approximately square-law drain current versus gate-source voltage characteristic. The functions for realization are derived and implemented in three basic circuit configurations: transconductance, self-conductance, and buffer function. The new circuits outperformed previous circuits in terms of chip area, power consumption, and efficiency. The alternative concept of voltage linearization is introduced. It was used to realize lossless buffer circuits. Optimization of FET gate widths to allow a verified realistic FET model was demonstrated
  • Keywords
    III-V semiconductors; Schottky gate field effect transistors; buffer circuits; field effect integrated circuits; linear integrated circuits; FET gate widths; FET model; GaAs; buffer function; chip area; efficiency; gate-source voltage; linearised GaAs MESFET circuit; linearized conductance functions; lossless buffer circuits; power consumption; self-conductance; square-law drain current; transconductance; voltage linearization; Circuit synthesis; Educational institutions; FETs; Gallium arsenide; MESFET circuits; Mathematics; Physics computing; Signal synthesis; Transconductance; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1992. ISCAS '92. Proceedings., 1992 IEEE International Symposium on
  • Conference_Location
    San Diego, CA
  • Print_ISBN
    0-7803-0593-0
  • Type

    conf

  • DOI
    10.1109/ISCAS.1992.230375
  • Filename
    230375