DocumentCode :
3276846
Title :
Combined effect of grain boundary depletion and PolySi/Oxide interface depletion on drain characteristics of a p-MOSFET
Author :
Suresh, P.R. ; Venugopal, P. ; Selvam, S.T. ; Potla, Suresh
Author_Institution :
Texas Instrum. Ltd., Bangalore, India
fYear :
1996
fDate :
3-6 Jan 1996
Firstpage :
156
Lastpage :
161
Abstract :
The effect of poly depletion on the drain characteristics of a ULSI p-MOSFET has been studied using a 2D-device simulator MEDICITM(1). The combined effect of both grain boundary depletion and PolySi/Oxide interface depletion at the polysilicon gate on the drain characteristics is described. The MOSFET parameters considered for analysis were the threshold voltage, drive current and subthreshold slope. It is found that a smaller grain size, lower carrier concentration in polysilicon and higher trap density at grain boundaries increase the grain boundary depletion effects on the drain characteristics
Keywords :
MOSFET; ULSI; grain boundaries; semiconductor device models; 2D device simulation; MEDICI; Si-SiO2; ULSI p-MOSFET; carrier concentration; drain characteristics; drive current; grain boundary depletion; grain size; polysilicon/oxide interface depletion; subthreshold slope; threshold voltage; trap density; CMOS technology; Capacitance-voltage characteristics; Doping; Grain boundaries; Grain size; MOSFET circuits; Medical simulation; Silicon; Threshold voltage; Ultra large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 1996. Proceedings., Ninth International Conference on
Conference_Location :
Bangalore
ISSN :
1063-9667
Print_ISBN :
0-8186-7228-5
Type :
conf
DOI :
10.1109/ICVD.1996.489476
Filename :
489476
Link To Document :
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