Title :
Design of high performance two stage CMOS cascode op-amps with stable biasing
Author :
Mandal, Pradip ; Visvanathan, V.
Author_Institution :
Dept. of Electr. Commun. Eng., Indian Inst. of Sci., Bangalore, India
Abstract :
The technique of mirror biasing is introduced and applied to a very high gain two stage CMOS cascode op-amp, in order to desensitize its output voltage to bias variations. Various performance metrics like low frequency common mode and power supply rejection ratios, slew rate and the sensitivity of the systematic offset are substantially improved. The improved performance is theoretically predicted and substantiated through circuit simulations
Keywords :
CMOS analogue integrated circuits; circuit analysis computing; circuit stability; integrated circuit design; operational amplifiers; bias variations; circuit simulations; low frequency common mode rejection ratios; mirror biasing; output voltage; performance metrics; power supply rejection ratios; slew rate; stable biasing; systematic offset; two stage CMOS cascode op-amps; Analog circuits; CMOS analog integrated circuits; Circuit simulation; Frequency; Measurement; Mirrors; Operational amplifiers; Power supplies; Topology; Voltage;
Conference_Titel :
VLSI Design, 1996. Proceedings., Ninth International Conference on
Conference_Location :
Bangalore
Print_ISBN :
0-8186-7228-5
DOI :
10.1109/ICVD.1996.489491
