A versatile fading simulator for on-chip verification of MIMO communication systems

In this paper, we present a single-chip design for the accelerated verification of multiple-input multiple-output (MIMO) wireless communication systems. Our design integrates the data source, MIMO transmitter, multipath fading channel, MIMO receiver, data sink and error performance measurement on a single chip for prototyping and verification at hardware speeds. The implemented baseband fading channel simulator can be reconfigured interactively to simulate a fading channel using different channel models. The size and performance of our design is illustrated by hardware implementation. Our design methodology can be used to speed up design verification of a wide variety of wireless communication systems.