A high gain, low voltage folded-switching mixer with current-reuse in 0.18 μm CMOS

Author

Vidojkovic, Vojkan ; Der Tang, Johan Van ; Leeuwenburgh, Arjan ; Van Roermund, Arthur

Author_Institution

Eindhoven Univ. of Technol., Netherlands

fYear

2004

fDate

6-8 June 2004

Firstpage

31

Lastpage

34

Abstract

The scaling of CMOS technologies has a great impact on analog design. The most severe consequence is a reduction of the voltage supply. In this article, a new low voltage folded-switching mixer with current reuse, which operates at 1 V supply voltage, is discussed. The main advantages of the introduced mixer topology are: a high voltage gain, a moderate noise figure and an operation at low supply voltages. Full insight into mixer operation is given by analyzing voltage gain, noise figure, linearity (IIP3) and DC stability. The mixer is designed and implemented in 0.18 μm CMOS technology with MIM capacitors as an option. The active chip area is 160 μm×200 μm. At 2.4 GHz, a single side band (SSB) noise figure of 13.9 dB, a voltage gain of 11.9 dB and IIP3 of -3 dBm are measured at a supply voltage of 1 V and with a power consumption of 3.2 mW.

Keywords

CMOS analogue integrated circuits; MIM devices; UHF mixers; circuit stability; low-power electronics; 0.18 micron; 1 V; 11.9 dB; 13.9 dB; 160 micron; 2.4 GHz; 200 micron; 3.2 mW; CMOS; DC stability; MIM capacitors; SSB noise figure; current-reuse; folded-switching mixer; high gain mixer; high voltage gain; linearity; low supply voltage operation; low voltage mixer; Amplitude modulation; CMOS technology; Gain; Linearity; Low voltage; MIM capacitors; Noise figure; Power measurement; Stability analysis; Topology;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits (RFIC) Symposium, 2004. Digest of Papers. 2004 IEEE

ISSN

1529-2517

Print_ISBN

0-7803-8333-8

Type

conf

DOI

10.1109/RFIC.2004.1320517

Filename

1320517