• DocumentCode
    3278461
  • Title

    A multi-level simulation approach in a Simulink-based design tool for FPGAs

  • Author

    Tranchero, Maurizio ; Reyneri, Leonardo M.

  • Author_Institution
    Dipt. di Elettron., Politec. di Torino, Torino, Italy
  • fYear
    2009
  • fDate
    9-11 Sept. 2009
  • Firstpage
    19
  • Lastpage
    22
  • Abstract
    This paper describes how simulation across multi-abstraction level problem has been solved in CodeSimulink environment, a high-level design tool for FPGAs and DSPs. We detail how we achieve the desired behavior at almost every considered level (i.e., Simulink, RTL and on-chip). We also show some results on simple applications to validate the approach.
  • Keywords
    circuit simulation; digital signal processing chips; field programmable gate arrays; logic CAD; CodeSimulink environment; DSP; FPGA; Simulink-based design tool; high-level design tool; multiabstraction level problem; multilevel simulation approach; Automotive engineering; Circuit simulation; Consumer electronics; Digital signal processing; Embedded system; Field programmable gate arrays; Home appliances; Monitoring; System testing; Time to market;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOC Conference, 2009. SOCC 2009. IEEE International
  • Conference_Location
    Belfast
  • Print_ISBN
    978-1-4244-4940-8
  • Electronic_ISBN
    978-1-4244-4941-5
  • Type

    conf

  • DOI
    10.1109/SOCCON.2009.5398105
  • Filename
    5398105