DocumentCode :
3278499
Title :
High speed bus design using HSPICE optimization techniques based on the worst case design approach
Author :
Lakhani, R. ; Franzon, P. ; Steer, Michael
Author_Institution :
North Carolina State Univ., Raleigh, NC
fYear :
1996
fDate :
28-30 Oct 1996
Firstpage :
93
Lastpage :
96
Abstract :
In this paper, a deterministic “worst case” design approach based on the HSPICE technique for the interconnect and package optimization of high speed digital circuits is presented. The HSPICE technique is based on using user-defined parameters to central component values and trace dimensions and specifying optimization parameters. To demonstrate the technique, an example of a high speed data bus is presented
Keywords :
SPICE; circuit CAD; circuit optimisation; digital circuits; integrated circuit interconnections; packaging; printed circuit design; HSPICE optimization techniques; PCB mounted chips; deterministic design approach; high speed bus design; high speed data bus; high speed digital circuits; interconnect optimization; package optimization; worst case design approach;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Performance of Electronic Packaging, 1996., IEEE 5th Topical Meeting
Conference_Location :
Napa, CA
Print_ISBN :
0-7803-3514-7
Type :
conf
DOI :
10.1109/EPEP.1996.564792
Filename :
564792
Link To Document :
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