DocumentCode :
3278561
Title :
Single byte error control codes with adjacent double bit error correcting capability for computer memory systems
Author :
Umanesan, Ganesan ; Fujiwara, Eiji
Author_Institution :
Graduate Sch.of Inf. Sci. & Eng., Tokyo Inst. of Technol., Japan
fYear :
2001
fDate :
2001
Firstpage :
271
Abstract :
We propose a class of codes called adjacent double bit error correcting-single byte error detecting (ADEC-SbED) codes for high speed semiconductor memory systems
Keywords :
error correction codes; error detection codes; semiconductor storage; ADEC-SbED codes; adjacent double bit error correcting capability; computer memory systems; high speed semiconductor memory systems; single byte error control codes; Computer errors; Electromagnetic interference; Electromagnetic scattering; Error correction; Error correction codes; Information science; Neutrons; Null space; Semiconductor device noise; Semiconductor memory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Information Theory, 2001. Proceedings. 2001 IEEE International Symposium on
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-7123-2
Type :
conf
DOI :
10.1109/ISIT.2001.936134
Filename :
936134
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=3278561
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