A unified component modeling approach for performance estimation in hardware/software codesign

Presents an approach for abstract modeling of hardware/software architectures using hierarchical colored Petri nets. The approach is able to capture complex behavioral characteristics often seen in software and hardware architectures; thus, it is suitable for high-level codesign issues such as performance estimation. In this paper, the development of a model of the ARM7 processor is described to illustrate the full potential of the modeling approach. To further illustrate the approach, a cache model is also described. The approach and related tools are currently being implemented in LYCOS (LYngby COsynthesis System)