DocumentCode :
327877
Title :
Multi-criterial state assignment for low power FSM design
Author :
Koegst, Manfred ; Franke, Gunter ; Rulke, Steffen ; Feske, Klaus
Author_Institution :
Fraunhofer-Inst. Intgrierte, Dresden, Germany
Volume :
1
fYear :
1998
fDate :
25-27 Aug 1998
Firstpage :
261
Abstract :
Reducing power consumption has become one of the biggest challenges in VLSI design. In control-flow intensive designs like networking and controller applications, the largest fraction of power consumption in CMOS is caused by signal switches. The presented approach addresses the reduction of switching activity. This is basically done by state assignment concerning a given user-specified input pattern sequence. Besides reducing register switchings, power can be saved by, for example, a partial deactivation of the circuit or a parts of it. There is a strong dependency between the used deactivation method, the selection of circuit parts for deactivation, the additional deactivation logic and the state assignment. The aim of this paper is to consider these dependencies in a multi-criterial optimization approach. This is done by a unified specification of the additional deactivation costs as constraints for state encoding. The result of our investigation is a multi-criterial assignment procedure which enables us to specify an optimal code concerning different criteria
Keywords :
CMOS logic circuits; VLSI; circuit optimisation; finite state machines; integrated circuit design; logic design; operations research; power consumption; state assignment; CMOS; VLSI design; additional deactivation costs; circuit parts selection; control-flow intensive designs; controller applications; deactivation logic; deactivation method; low-power finite state machine design; multicriteria optimization approach; multicriteria state assignment; networking applications; optimal code specification; power consumption reduction; signal switches; state encoding; switching activity reduction; user-specified input pattern sequence; Control systems; Costs; Design optimization; Encoding; Energy consumption; Logic circuits; Registers; Signal design; Switches; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Euromicro Conference, 1998. Proceedings. 24th
Conference_Location :
Vasteras
ISSN :
1089-6503
Print_ISBN :
0-8186-8646-4
Type :
conf
DOI :
10.1109/EURMIC.1998.711809
Filename :
711809
Link To Document :
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