Multi-criterial state assignment for low power FSM design

Reducing power consumption has become one of the biggest challenges in VLSI design. In control-flow intensive designs like networking and controller applications, the largest fraction of power consumption in CMOS is caused by signal switches. The presented approach addresses the reduction of switching activity. This is basically done by state assignment concerning a given user-specified input pattern sequence. Besides reducing register switchings, power can be saved by, for example, a partial deactivation of the circuit or a parts of it. There is a strong dependency between the used deactivation method, the selection of circuit parts for deactivation, the additional deactivation logic and the state assignment. The aim of this paper is to consider these dependencies in a multi-criterial optimization approach. This is done by a unified specification of the additional deactivation costs as constraints for state encoding. The result of our investigation is a multi-criterial assignment procedure which enables us to specify an optimal code concerning different criteria