A transistor-level test strategy for C/sup 2/MOS MOUSETRAP asynchronous pipelines

We discuss a transistor-level test methodology for C²MOS asynchronous pipelines. Unlike their static CMOS counterparts, wherein testing for stuck-at faults and compliance to a few timing constraints typically suffices, dynamic asynchronous pipelines present new challenges which require more elaborate test solutions. More specifically, many gate-level input/output stuck-at faults of a static pipeline style translate into transistor-level stuck-open/stuck-short faults in the dynamic C²MOS version. Therefore, test methods for transistor-level faults are required for dynamic asynchronous pipelines. To this end, we propose a methodology for testing both gate-level stuck-at faults and transistor-level stuck-open/stuck-short faults in C²MOS pipelines. The proposed method does not employ additional hardware and is capable of detecting both gate-level and transistor-level faults, as we demonstrate on the C²MOS version of MOUSETRAP