A high-dynamic range CMOS buffer amplifier with high-drive capability

Author

Yazdi, Navid ; Ahmadi, M. ; Jullien, G.A. ; Shridhar, M.

Author_Institution

Dept. of Electr. Eng., Windsor Univ., Ont., Canada

Volume

5

fYear

1992

fDate

10-13 May 1992

Firstpage

2332

Abstract

A high-swing, high-drive CMOS buffer amplifier with a good stability over a wide range of capacitive and resistive loads is presented. A new area efficient output stage with a relatively small compensation capacitor has been used. The buffer was designed as a standard cell for analog and mixed mode VLSI applications and the current implementation is in a standard 3-μm p-well CMOS process. Simulations revealed a drive capability of 140 kHz into a 5000-pF load. The buffer has rail to rail output drive for resistive loads greater than 10 kΩ. The buffer had acceptable total harmonic distribution with loads down to 270 Ω

Keywords

CMOS integrated circuits; amplifiers; buffer circuits; linear integrated circuits; 140 kHz; 3 micron; CMOS buffer amplifier; area efficient output stage; compensation capacitor; high-drive capability; high-dynamic range; monolithic IC; p-well CMOS process; stability; standard cell; CMOS technology; Capacitance; Capacitors; Circuit simulation; Circuit stability; Dynamic range; Impedance; Operational amplifiers; Rail to rail outputs; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1992. ISCAS '92. Proceedings., 1992 IEEE International Symposium on

Conference_Location

San Diego, CA

Print_ISBN

0-7803-0593-0

Type

conf

DOI

10.1109/ISCAS.1992.230491

Filename

230491