Title :
Distributed MOS varactor biasing for VCO gain equalization in 0.13 μm CMOS technology
Author :
Mira, Julien ; Divel, Thierry ; Ramet, Serge ; Begueret, Jean-Baptiste ; Deval, Yann
Author_Institution :
Cellular Terminals Components-RF R&D, STMicroelectronics, Grenoble, France
Abstract :
The paper describes work done on a LC-VCO to linearize its frequency-voltage (Kvco) characteristic in order to extend its versatility. The technology used is a standard 0.13 μm CMOS supplied by 1.2 V. The optimization is made on the varactor stage of the resonator and gives a nearly constant Kvco (140±10 MHz/V from 2.36 GHz to 2.44 GHz), in spite of the MOS varactor non-linear characteristic, with still a good pushing (9 MHz/V) and constant phase noise (-126 dBc/Hz at 3 MHz offset).
Keywords :
CMOS analogue integrated circuits; MIS devices; integrated circuit design; linearisation techniques; optimisation; phase noise; resonators; varactors; voltage-controlled oscillators; 0.13 micron; 1.2 V; 2.36 to 2.44 GHz; CMOS technology; VCO gain equalization; distributed MOS varactor biasing; frequency-voltage characteristic; nonlinear characteristic; phase noise; resonator; varactor stage; CMOS technology; Capacitance; Frequency; Phase locked loops; Phase noise; Q factor; Tuning; Varactors; Voltage; Voltage-controlled oscillators;
Conference_Titel :
Radio Frequency Integrated Circuits (RFIC) Symposium, 2004. Digest of Papers. 2004 IEEE
Print_ISBN :
0-7803-8333-8
DOI :
10.1109/RFIC.2004.1320548
