• DocumentCode
    3279150
  • Title

    An adaptable compact thermal model for BGA packages

  • Author

    Xie, Ming ; Toh, Kok Chuan ; Pinjala, Damaruganath

  • Author_Institution
    Sch. of Mech. & Production Eng., Nanyang Technol. Univ., Singapore
  • fYear
    2002
  • fDate
    10-12 Dec. 2002
  • Firstpage
    304
  • Lastpage
    311
  • Abstract
    This paper presents a methodology for deriving compact models for BGA-type packages using a thermal resistance network approach that can respond easily to changes in package design parameters and operating conditions without a major redevelopment effort. The model assumes three major heat flow dissipation paths to the ambient: via package top, via PCB top and via PCB bottom. The internal features of the package or boards, such as solder ball joints, die, substrate, vias and thin metalised layers, are represented by appropriately derived functions, taking into account the spreading effect and resolved into equivalent 1D or 2D models that enable it to be used with the resistance elements in the heat flow paths. External resistance elements can be evaluated from heat transfer coefficients, assuming constant heat flux at each surface, obtained either analytically or from a simplified numerical model that requires only the external shape of the package and board. These relatively simpler models have been validated with experiments and full numerical models, using ICEPAK, as well as comparisons with more extensively determined empirical models and are shown to have thermal performance predictions of the same magnitude. Their simplicity in recomputation, when there are any dimensional or material changes, make them useful as a tool for package designers to explore various options during the development.
  • Keywords
    ball grid arrays; heat transfer; integrated circuit modelling; integrated circuit packaging; thermal analysis; thermal management (packaging); thermal resistance; BGA packages; adaptable compact thermal model; heat flow dissipation paths; heat transfer coefficients; package design parameter changes; package die; package substrate; package vias; resistance elements; solder ball joints; spreading effect; surface heat flux; thermal analysis; thermal performance predictions; thermal resistance network; thin metalised layers; Circuit simulation; Computational modeling; Electronic packaging thermal management; Heat transfer; Numerical models; Predictive models; Resistance heating; Surface resistance; Temperature; Thermal resistance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Packaging Technology Conference, 2002. 4th
  • Print_ISBN
    0-7803-7435-5
  • Type

    conf

  • DOI
    10.1109/EPTC.2002.1185688
  • Filename
    1185688