A variable-gain image-reject down-converter for 5-6 GHz WLAN applications

Author

Italia, Alessandro ; Ragonese, Egidio ; Palmisano, Giuseppe

Author_Institution

DIEES, Catania Univ., Italy

fYear

2004

fDate

6-8 June 2004

Firstpage

149

Lastpage

152

Abstract

A monolithic down-converter for 5-6 GHz WLAN applications was designed using a 46-GHz-f_T silicon bipolar process. The circuit consists of a variable-gain low noise amplifier and a double-balanced mixer. In high-gain mode, the down-converter exhibits a 3 dB noise figure and a 23 dB power gain, with an input compression point of -20 dBm. In low-gain mode, the circuit provides a 7.5 dB noise figure and a power gain of 12 dB, with an input compression point of -10 dBm. Moreover, an excellent image rejection ratio is achieved by means of monolithic passive notch filters, still maintaining a noise figure lower than 4 dB.

Keywords

MMIC amplifiers; MMIC mixers; bipolar analogue integrated circuits; integrated circuit design; integrated circuit noise; microwave frequency convertors; notch filters; passive filters; wireless LAN; 12 dB; 23 dB; 3 dB; 46 GHz; 5 to 6 GHz; 7.5 dB; Si; WLAN; circuit design; double-balanced mixer; image rejection ratio; image-rejection down-converter; input compression point; monolithic down-converter; monolithic passive notch filters; noise figure; power gain; silicon bipolar process; variable-gain down-converter; variable-gain low noise amplifier; Circuit noise; Image coding; Image converters; Impedance matching; Inductors; Linearity; Low-noise amplifiers; Noise figure; Passive filters; Wireless LAN;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits (RFIC) Symposium, 2004. Digest of Papers. 2004 IEEE

ISSN

1529-2517

Print_ISBN

0-7803-8333-8

Type

conf

DOI

10.1109/RFIC.2004.1320554

Filename

1320554