Title :
A CMOS 5.5/2.4 GHz dual-band smart-antenna transceiver with a novel RF dual-band phase shifter for WLAN 802.11a/b/g
Author :
Banbury, David R. ; Fayyaz, Nader ; Safavi-Naeini, Safieddin ; Nikneshan, Sasan
Author_Institution :
Dept. of Electr. Eng., Waterloo Univ., Ont., Canada
Abstract :
The paper presents the design of an integrated CMOS 5.5/2.4 GHz dual-band smart-antenna transceiver for WLAN 802.11a/b/g applications. The phase shifter in the transceiver provides a variable 0° to 360° RF phase shift to each signal path at both bands using a novel integrated phase shifting approach. The transceiver is a typical super-heterodyne architecture. The chip is designed to operate with any off-the-shelf digital baseband chip. It is fabricated in a 0.18 μm 60 GHz CMOS technology. The chip size is 2000 μm × 3000 μm. The overall power consumption, excluding off-chip power amplifier and IF/baseband chip, is 100 mW in receive mode and 90 mW in transmit mode, with an acceptable supply voltage range of 1.8 to 3.3 V.
Keywords :
CMOS analogue integrated circuits; MMIC phase shifters; UHF phase shifters; adaptive antenna arrays; integrated circuit design; multifrequency antennas; superheterodyne receivers; transceivers; wireless LAN; 0.18 micron; 1.8 to 3.3 V; 100 mW; 2.4 GHz; 2000 micron; 3000 micron; 5.5 GHz; 60 GHz; 90 mW; CMOS technology; IEEE 802.11a; IEEE 802.11b; IEEE 802.11g; RF dual-band phase shifter; RF phase shift; WLAN; dual-band antenna; dual-band smart-antenna transceiver; dual-band transceiver; off-the-shelf digital baseband chip; power amplifier; super-heterodyne architecture; Baseband; CMOS technology; Dual band; Energy consumption; Phase shifters; Power amplifiers; RF signals; Radio frequency; Transceivers; Wireless LAN;
Conference_Titel :
Radio Frequency Integrated Circuits (RFIC) Symposium, 2004. Digest of Papers. 2004 IEEE
Print_ISBN :
0-7803-8333-8
DOI :
10.1109/RFIC.2004.1320556
