DocumentCode :
3279526
Title :
Design analysis of solder joint reliability for stacked die mixed flip-chip and wirebond BGA
Author :
Yan, Tee Tong ; Lim, Mayhuan ; Shen, Ng Hun ; Baraton, Xavier ; Kaire, David ; Zhaowei, Zhong
Author_Institution :
STMicroelectronics, Singapore, Singapore
fYear :
2002
fDate :
10-12 Dec. 2002
Firstpage :
391
Lastpage :
397
Abstract :
Stacked die BGA has recently gained popularity in telecommunication applications. However, its board level solder joint reliability during the thermal cycling test is not as well-studied as common single die BGA. In this paper, solder joint fatigue of lead-free stacked die BGA with mixed flip-chip (FC) and wirebond (WB) interconnect is analyzed in detail. 3D fatigue model is established for stacked die BGA with considerations of detailed pad design, realistic shape of solder ball, and non-linear material properties. The fatigue model applied is based on a modified Darveaux´s approach with non-linear viscoplastic analysis of solder joints. The critical solder ball is observed located between the top and bottom dice corner, and failure interface is along the top solder/pad interface. The modeling predicted fatigue life is first correlated to the thermal cycling test results using modified correlation constants, curve-fitted from in-house lead-free TFBGA46 (thin-profile fine-pitch BGA) thermal cycling test data. Subsequently, design analyses are performed to study the effects of 20 key design variations in package dimensions, material properties, and thermal cycling test conditions. In general, thinner PCB and mold compound, thicker substrate, larger top or bottom dice sizes, thicker top die, higher solder ball standoff, larger solder mask opening, smaller PCB pad size, smaller thermal cycling temperature range, longer ramp time, and shorter dwell time contribute to longer fatigue life. SnAgCu is a common lead-free solder, and it has much better board level reliability performance than eutectic solder.
Keywords :
ball grid arrays; fatigue; fine-pitch technology; flip-chip devices; lead bonding; reliability; soldering; viscoplasticity; 3D fatigue model; Darveaux methodology; SnAgCu; design analysis; failure interface; fatigue life; flip-chip interconnect; lead-free solder; nonlinear viscoplastic analysis; solder joint reliability; stacked die BGA; thermal cycling; thin-profile fine-pitch BGA; wire bond interconnect; Data analysis; Environmentally friendly manufacturing techniques; Fatigue; Lead; Life testing; Material properties; Performance analysis; Predictive models; Shape; Soldering;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Packaging Technology Conference, 2002. 4th
Print_ISBN :
0-7803-7435-5
Type :
conf
DOI :
10.1109/EPTC.2002.1185704
Filename :
1185704
Link To Document :
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