A novel phase-locked loop for three-phase ups under distorted utility conditions

The characteristic of PLL (phased-locked Loop) has very important influence on the performance of UPS (uninterruptible power supply). Sometimes, false phase can be locked by the classical PLL circuit based on detecting the zero crossing points due to the wrong phase information under distorted utility conditions. This paper proposes a novel PLL which implements phase-locked through eliminating the DC component of instantaneous power for three-phase UPS. The proposed PLL system can detect the positive sequence components to realize phase-locked for the fundamental wave voltage of unbalanced utility. The model of PLL has been analyzed. How to determine the parameters of loop filter has been proposed. The system is controlled by 32 bit DSP, TMS320F2812. The good performance of the PLL system for three-phase UPS has been verified by simulation and experimental results.