Title :
Redundancy method to assess electromigration lifetime in power Grid design
Author :
Ouattara, Boukary ; Doyen, Lise ; Ney, D. ; Mehrez, H. ; Bazargan-Sabet, P. ; Bana, Franck Lionel
Author_Institution :
STMicroelectron., Crolles, France
Abstract :
The tendency of semiconductor market to increase component density in small chip leads to reliability issues such as Electromigration (EM). This phenomenon becomes critical in deep submicron design technology. In this paper we assess chip power grid lifetimes by taking into account redundant paths contribution in case of EM degradation. The application of this method for wire lifetime validation of a 32nm microprocessor has reduced significantly wires susceptible to EM given by simulation tools.
Keywords :
electromigration; integrated circuit reliability; power grids; redundancy; EM degradation; chip power grid lifetimes; deep submicron design technology; electromigration lifetime; microprocessor; power grid design; redundancy method; wire lifetime validation; Degradation; Electromigration; Mathematical model; Power grids; Redundancy; Standards; Wires;
Conference_Titel :
Interconnect Technology Conference (IITC), 2013 IEEE International
Conference_Location :
Kyoto
Print_ISBN :
978-1-4799-0438-9
DOI :
10.1109/IITC.2013.6615570
