Logic restructuring for delay balancing in wave-pipelined circuits: an integer programming approach

In this paper we apply integer programming (IF) based techniques to the problem of delay balancing in wave-pipelined circuits. The proposed approach considers delays, as well as fan-in and fan-out associated with every node in the circuit. After a weighted graph representation of the circuit is formed a node collapsing procedure is used to preprocess (reduce the size of) the system and to obtain the final formulation of the IF problem, which is solved by using a branch and bound heuristic to acquire a minimum delay in the circuit. We also compare the proposed technique with application - to the same problem - of a linear programming solver.