DocumentCode :
3281707
Title :
CMOS compatible process for suspended high-aspect-ratio integrated silicon microstructures
Author :
Qian, Liang ; Hong, P.Z. ; Sun, L.N. ; Yang, Z.C. ; Yan, G.Z.
fYear :
2011
fDate :
20-23 Feb. 2011
Firstpage :
397
Lastpage :
400
Abstract :
A CMOS compatible process for fabricate high aspect ratio integrated silicon microstructure which provides a possibility of bulk integrating micromachining with CMOS circuit on a chip. The MEMS structures is fabricated on the same substrate of their interface CMOS circuits and electrically isolated from the circuits by trenches which promises to enhance the system performance as well as lower the packaging cost of micromachining inertial devices. The residue silicon was removed before structure releasing with selected area anisotropic etching. The electrical characteristics of the transistors with MEMS fabrication agrees well with those without MEMS fabrication.
Keywords :
CMOS integrated circuits; etching; micromachining; silicon; CMOS circuit; CMOS compatible process; MEMS fabrication; MEMS structure; Si; anisotropic etching; bulk integrating micromachining; micromachining inertial device packaging cost; suspended high-aspect-ratio integrated silicon microstructure; transistors; CMOS integrated circuits; Etching; Fabrication; Micromechanical devices; Sensors; Silicon; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nano/Micro Engineered and Molecular Systems (NEMS), 2011 IEEE International Conference on
Conference_Location :
Kaohsiung
Print_ISBN :
978-1-61284-775-7
Type :
conf
DOI :
10.1109/NEMS.2011.6017376
Filename :
6017376
Link To Document :
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