A family of bias circuits for high input swing CMOS operational amplifiers

Author

Duque-Carrillo, J.F. ; Pérez-Aloe, R. ; Valverde, J.M. ; Morillo, A.

Author_Institution

Univ. de Extremadura, Badajoz, Spain

Volume

6

fYear

1992

fDate

10-13 May 1992

Firstpage

3021

Abstract

A set of three circuits for biasing CMOS amplifiers with rail-to-rail input common-mode range is presented. By controlling the bias current levels, they avoid the large magnitude deviations inherent in these amplifiers with composite input pairs. The deviations are with regard to their value for input voltages in the mid-range between supplies. Thus, the optimization and compensation is facilitated, as well as an increase in the common-mode rejection ratio (CMRR) over 17 dB in comparison to the classical biasing schemes

Keywords

CMOS integrated circuits; linear integrated circuits; operational amplifiers; CMOS amplifiers; CMRR; bias circuits; common-mode rejection ratio; compensation; composite input pairs; high input swing; op amp; opamp; operational amplifiers; optimization; rail-to-rail input common-mode range; Circuits; Differential amplifiers; Operational amplifiers; Physics; Power supplies; Rail to rail amplifiers; Rail to rail inputs; Signal to noise ratio; Transconductance; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1992. ISCAS '92. Proceedings., 1992 IEEE International Symposium on

Conference_Location

San Diego, CA

Print_ISBN

0-7803-0593-0

Type

conf

DOI

10.1109/ISCAS.1992.230685

Filename

230685