Title :
Test Pattern Generation Based On Arithmetic Operations
Author :
Gupta, Sanjay ; Rajski, Janusz ; Tyszer, Jerzy
Keywords :
Adders; Arithmetic; Automatic testing; Built-in self-test; Circuit testing; Compaction; Degradation; Hardware; Performance evaluation; Test pattern generators;
Conference_Titel :
Computer-Aided Design, 1994., IEEE/ACM International Conference on
Print_ISBN :
0-8186-3010-8
DOI :
10.1109/ICCAD.1994.629753
