DocumentCode :
3282566
Title :
Random Pattern Testable Logic Synthesis
Author :
Chiang, Chen-Huan ; Gupta, Sandeep K.
fYear :
1994
fDate :
6-10 Nov 1994
Firstpage :
125
Lastpage :
128
Keywords :
Automatic testing; Built-in self-test; Circuit faults; Circuit synthesis; Circuit testing; Electrical fault detection; Fault detection; Logic circuits; Logic testing; Test pattern generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design, 1994., IEEE/ACM International Conference on
ISSN :
1063-6757
Print_ISBN :
0-8186-3010-8
Type :
conf
DOI :
10.1109/ICCAD.1994.629754
Filename :
629754
Link To Document :
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