DocumentCode
3282638
Title
A method of randomizing a part of an FPGA configuration bitstream
Author
Nakanishi, Masaki ; Murakami, Yumiko
Author_Institution
Grad. Sch. of Inf. Sci., Nara Inst. of Sci. & Technol., Ikoma
fYear
2008
fDate
7-10 Dec. 2008
Firstpage
1
Lastpage
4
Abstract
FPGAs are widely used recently, and security on configuration bitstreams is of concern to both users and suppliers of configuration bitstreams (e.g., intellectual property vendors). In order to protect configuration bitstreams against the threats such as FPGA viruses, piracy and reverse engineering, configuration bitstreams need to be encrypted and authenticated before loaded into FPGAs. We previously proposed a configuration scheme that protects configuration bitstreams, which uses a part of a target circuit (i.e., a part of a configuration bitstream of a target circuit) as a secret key. Our proposed scheme has an advantage of using public-key cryptography, while other known methods can use only symmetric-key cryptography. However, ideally, the secret key should not be a part of a configuration bitstream but a random bit string. In this paper, we propose a method that randomizes a part of a configuration bitstream, so that it can be used as a one-time pad for our configuration scheme.
Keywords
field programmable gate arrays; message authentication; public key cryptography; random processes; FPGA configuration bitstream; public-key cryptography; random bit string; randomizing method; security; symmetric-key cryptography; target circuit; Authentication; Circuits; Field programmable gate arrays; Information theory; Intellectual property; Protection; Public key cryptography; Reconfigurable logic; Reverse engineering; Routing;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Theory and Its Applications, 2008. ISITA 2008. International Symposium on
Conference_Location
Auckland
Print_ISBN
978-1-4244-2068-1
Electronic_ISBN
978-1-4244-2069-8
Type
conf
DOI
10.1109/ISITA.2008.4895640
Filename
4895640
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