DocumentCode :
3282818
Title :
Pattern classification using trainable logic networks
Author :
Evans, Bruce W.
Author_Institution :
TRW Inc., Redono Beach, CA, USA
fYear :
1989
fDate :
0-0 1989
Firstpage :
429
Abstract :
The author describes a new pattern classification algorithm which has the simplicity of the well-known multilinear classifier but is capable of learning patterns through supervised training. This is achieved by replacing the discretely valued logic functions employed in the conventional classifier with continuous extensions. The resulting differentiable relationship between network parameters and outputs permits the use of gradient descent methods to select optimal classifier parameters. This classifier can be implemented as a network whose structure is well suited to highly parallel hardware implementation. Essentially, the same network can be used both to compute weight adjustments and perform classifications, so that the same hardware could be used for both rapid training and classification. The author has applied this classifier to a noisy parity detection problem. The classification error frequency obtained in this example compares favourably with the theoretical lower bound.<>
Keywords :
computerised pattern recognition; learning systems; neural nets; optimisation; parallel architectures; classification error frequency; computerised pattern recognition; gradient descent methods; learning; neural nets; parallel architectures; pattern classification; supervised training; trainable logic networks; Learning systems; Neural networks; Optimization methods; Parallel architectures; Pattern recognition;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Neural Networks, 1989. IJCNN., International Joint Conference on
Conference_Location :
Washington, DC, USA
Type :
conf
DOI :
10.1109/IJCNN.1989.118599
Filename :
118599
Link To Document :
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