Title :
Edge-map: Optimal Performance Driven Technology Mapping for Iterative Lut Based Fpga Designs
Author :
Yang, Honghua ; Wong, D.F.
Keywords :
Circuit testing; Computer networks; Delay estimation; Field programmable gate arrays; Heuristic algorithms; Integrated circuit interconnections; Iterative algorithms; Packaging; Routing; Table lookup;
Conference_Titel :
Computer-Aided Design, 1994., IEEE/ACM International Conference on
Print_ISBN :
0-8186-3010-8
DOI :
10.1109/ICCAD.1994.629758
