A CMOS fully-balanced continuous-time IFLF filter design for read/write channels

The design and implementation method of a CMOS continuous-time inverse-follow-the-leader feedback (IFLF) filter are described. The approach permits the realization of arbitrary transfer functions. A seventh-order lowpass filter with equiripple delay and real zeros to effect a gain boost is implemented by using a linear, fully-balanced CMOS operational transconductance amplifier (OTA) which has high DC gain and extremely wide bandwidth. SPICE simulations show that the cut-off frequency of the lowpass filter without real zeros and with real zeros ranged from 5 to 20 MHz and 10 to 47 MHz, respectively. Total harmonic distortion (THD) is less than 0.45% for a differential input voltage of V_in=1 V_pp at 1 MHz. Power consumption is 120 mW for a 5-V supply